1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing thereof, and more particularly, to a semiconductor device having a structure in which a pad electrode in an interconnection layer on a semiconductor substrate is connected to an external terminal by wire bonding, and a method of manufacturing thereof.
2. Description of the Background Art
Various wirings are used in a semiconductor device for electrically connecting elements formed on the semiconductor substrate to each other.
It is also necessary to electrically connect an interconnection layer of this semiconductor substrate to an external terminal of a semiconductor device or a package. This was carried out by a method of connecting a pad electrode of an interconnection layer formed on a semiconductor substrate to an external terminal by wire bonding.
FIG. 1 is a sectional view of a conventional semiconductor device having such a structure. A bonding pad electrode 21 is formed on a semiconductor chip 20 having devices formed thereon. The main surface of semiconductor chip 20 is covered with a protection insulation film 22. A die pad 23a on which semiconductor chip is placed implements a lead frame 23 with an external terminal (lead) 23b. Pad electrode 21 on semiconductor chip 20 is connected to external terminal (lead) 23b by a bonding wire 24. Chip 20 is sealed with a molding resin material 25.
The structure of semiconductor chip 20 will be described hereinafter with an enlarged portion of A of FIG. 1 taking a DRAM (Dynamic Random Access Memory) device as an example.
FIG. 2 is a sectional view showing a conventional DRAM device. A DRAM device (stacked cell) 2 is formed on the surface of a silicon semiconductor substrate 1. A first insulation film 3 is deposited on a DRAM device (stacked cell) 2. A first interconnection layer 4 is formed on first insulation film 3. A second insulation film 5 is deposited as a protection insulation film on first interconnecting wiring 4. Second insulation film 5 corresponds to protection insulation film 22 of FIG. 1. Bonding pad electrode 6 is connected to external terminal (lead) 23b of FIG. 1 by bonding wire 24 through a bonding pad electrode opening 7, and sealed with molding resin sealing material 25.
In this conventional structure, bonding pad electrode 6 is not covered with the material of bonding wire 24. Such wire bonding of a bonding pad is disclosed in Japanese Patent Laying-Open No. 52-32263, for example.
An example of a manufacture flow of a conventional semiconductor device will be explained hereinafter mainly on the bonding pad electrode formation step and the wire bonding step.
Referring to FIG. 3A, a DRAM device (stacked cell) 2 constituted by an element isolation oxide film 301, a transfer gate electrode 302, an impurity diffusion layer 303, a word line 304, a storage node 305, a capacitor insulation film 306 and a cell plate 307 is formed on the surface of a silicon semiconductor substrate 1.
Referring to FIG. 3B, a first insulation film 3 is deposited all over silicon semiconductor substrate 1 having DRAM device (stacked cell) 2 formed thereon. Then, a contact hole 308 is formed at a desired location using photolithography and etching.
Next, an aluminum interconnection layer which is first interconnection layer 4 is formed as the bit line. In recent submicron devices, an interconnection layer formed of a combined structure of a barrier metal film 309 such as of titanium nitride (TiN) and titanium-tungsten (TiW) and an aluminum alloy film 310 such as of Al-Si, Al-Si-Cu is used as the first layer of aluminum interconnection layer 4 to: (1) prevent junction leak due to abnormal reaction (alloy spike) between aluminum and the silicon substrate (impurity diffusion layer) at the contact, (2) prevent contact fault caused by silicon in the aluminum alloy film precipitating into the contact due to solid phase epitaxial growth, (3) improve tolerability to "stress migration" where the interconnection layer is disconnected by film stress of the interlayer insulation film and protection insulation film formed over the aluminum interconnection layer.
The above-mentioned layers are generally deposited by sputtering, and patterned as first aluminum interconnection layer 4 and bonding pad electrode 6 using photolithography and etching.
Then, a silicon oxide film is deposited as protection insulation film 5 over first interconnection layer 4 by chemical vapor deposition (CVD) using plasma at a film deposition temperature of 300.degree.-400.degree. C. with monosilane (SiH.sub.4) and nitrous oxide (N.sub.2 O) gas, for example (FIG. 3C).
A silicon nitride film or a silicon oxynitride film comprising the characteristics of low transmittance of water and the like and high mechanical strength in comparison with a silicon oxide film, or a combination of these may be used for protection insulation film 5.
In the case of silicon nitride film, protection insulation film 5 is deposited using the above-described CVD method using plasma with monosilane (SiH.sub.4) and ammonia (NH.sub.3) gas. In the case of silicon oxynitride film, the protection insulation film is deposited using monosilane (SiH.sub.4), ammonia (NH.sub.3) and nitrous oxide (N.sub.2 O) gas.
The deposited protection insulation film 5 has an opening formed by lithography or etching to provide a bonding pad electrode opening 7 for wire bonding, as shown in FIG. 3D.
Semiconductor substrate 1 having a device formed is cut out as a semiconductor chip 20 by dicing. Semiconductor chip 20 is attached to die pad 23a on lead frame 23 of FIG. 1 by soldering or using conductive resin and the like.
Next, bonding pad electrode 6 is connected to lead 23b of lead frame 23 with a bonding wire 24 formed of a gold wire and the like via bonding pad electrode opening 7 (FIG. 3E).
The gold wire and the like is connected by thermal compression, or by a bonding method combining the usage of thermal compression and ultrasonic.
Lastly, the whole portion is packaged by molding resin 25 (FIG. 3F).
A conventional molding resin sealed type semiconductor device provokes the following problems since aluminum film 311 of bonding pad electrode 6 is exposed around wire bonding material 24.
The exposed portion of aluminum film 311 is corroded by moisture 312 intruding through molding resin 25 to generate a hole 313. Therefore, the likelihood increases of reliability (moisture resistance) failure that is an electrical open failure at bonding pad electrode 6.
The size of a bonding pad is reduced in proportion to the number of terminal pins which are recently increasing corresponding to multifunctions of a semiconductor device. Also, the thickness of a semiconductor device package, substantially the thickness of the mold resin is reduced corresponding to high density surface mounting. These semiconductor devices will be more easily affected by intruding moisture, so that the above-described problem will become more serious.